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Home Capability Rigid PCBs (RoHS and Non-RoHS) - Small Volume

Capability

QualiEco Circuits specialises in smart yet simple PCB solutions – we’re always one step ahead in technology and innovation. Rigid PCBs Small Volume – In detail

Prototype PCBsStandard PCBsDescription

TOPPCB Details
  • Max. no. of layers28 layers32 layers
  • Max. board size (L x W) in mm900mm x 580mm1200mm x 600mm
  • Max. board thickness (in mm.)3.2mm6mm
  • Min. finished board thickness (in mm.)0.4mm0.2mm
  • Min. Core Thickness0.13mm0.13mm
  • Min. Dielectric0.075mm0.075mm
TOPBase Material
  • (A) Base MaterialFR4 (Std, High Tg & HF)FR4 (Std, High Tg & HF)
  • (B) Inner layer Copper cladding  
  • * Max. Cu Wt. For Planes (Oz.)105µm (3oz)210µm (6oz)
  • * Max. Cu Wt. For Signals (Oz.)105µm (3oz)210µm (6oz)
  • * Min. Cu Wt. (Oz.)18µm (1/2oz)12µm (1/3oz)
  • (C) Outer layer Copper cladding  
  • *Max Cu Wt. (Oz.)140µm (4oz)210µm (6oz)
  • *Min Cu Wt. (Oz.)35µm (1oz)35µm (1oz)
TOPEtching
  • Minimum (in mils)Trace WidthSpacingTrace WidthSpacing
  • For copper thickness of 0.5 Oz4mil4mil3mil3.5mil
  • For copper thickness of 1.0 Oz4mil4mil3mil3.5mil
  • For copper thickness of 2.0 Oz8mil8mil7mil7mil
  • For copper thickness of 3.0 Oz9mil10mil9mil10mil
TOPDrilling
  • Min. finished via hole size    
  • Mechanical Drilling0.2mm0.2mm
  • Laser Drilling0.15mm0.1mm
  • Min. finished via pad size0.5mm0.4mm
  • Min. annular ring (via holes)5 mils4 mils
  • Min. annular ring (Component holes)8mil6 mils
  • Min. hole size tolerance (in mils)PTHNPTHPTHNPTH
  • Hole size < 0.024"+/-0.076mm+/-0.05mm+/-0.076mm+/-0.05mm
  • Hole size > 0.024" < 0.138"+/-0.076mm+/-0.05mm+/-0.076mm+/-0.05mm
  • Hole size > 0.138"+/-0.076mm+/-0.76mm+/-0.076mm+/-0.076mm
  • Blind & Buried vias manufacturableYESYES
  • Drill to track clearance for inner layers0.18mm (4L)
    0.20mm (6L)
    0.25mm (8L)
    0.30mm (10L)
    0.18mm (4L)
    0.20mm (6L)
    0.25mm (8L)
    0.30mm (10L)
  • Min. annular ring (Component holes)0.2mm to 0.4mm0.2mm to 0.4mm
TOPPlating / Surface Treatment
  • HASLYESYES
  • Electrolytic GoldYESYES
  • Electroless Nickel / GoldYESYES
  • SMOBC with OSP (Entek Coating)YESYES
  • Immersion SilverYESYES
  • Immersion TinYESYES
TOPLayer construction & Impedance Design
  • Min. core thickness0.09mm0.06mm
  • Preferred varieties of Thin core laminates generally stocked (in mils) 0.09/ 0.13/ 0.15/ 0.2/ 0.27/ 0.3/ 0.35/ 0.4/ 0.5/ 0.6/ 0.8/ 1.0/ 1.2mm0.06/ 0.13/ 0.15/ 0.2/ 0.27/ 0.3/ 0.35/ 0.4/ 0.5/ 0.6/ 0.8/ 1.0/ 1.2mm
  • Prepregs generally stocked (in mils)2.56mil3.54mil
TOPMaximum Fabrication Tolerance
  • Maximum Fabrication Tolerance5mil5mil
TOPSolder mask
  • Mask opening (pad + XXX)4mil3mil
  • Min. solder mask web width between pads5mil4mil
  • PAD to PAD min. space if web required3mil3mil
  • SM clearance to PAD3mil2.5mil
  • Min. SM thickness0.4mil0.4mil
TOPComponent Reference (Silk Screen)
  • Legend (Silk Screen) line width6mil5mil
  • Min. character height30mil25mil
  • Min. character spacing4mil4mil
TOPElectrical Test
  • CAD net list testing (IPC356D)7mil4mil
  • Min. SMD pitch testable0.4mm0.3mm
  • Min SMD pad width testable0.2mm0.2mm
  • Max testing area (mm x mm)400mmx600mm600mmx1200mm
  • Testing voltage250V DC250V DC
  • Open resistance10MΩ10MΩ
  • Short resistance50MΩ50MΩ
  • Top and Bottom Test simultaneouslyYESYES
TOPControlled Impedance measurement
  • Controlled Impedance measurementYESYES
TOPInner Layers (VCC and GND Layers)
  • Minimum Isolation from finished Drill0.18mm (4L)
    0.20mm (6L)
    0.25mm (8L)
    0.30mm (10L)
    0.18mm (4L)
    0.20mm (6L)
    0.25mm (8L)
    0.30mm (10L)
  • Up to 8 Layers (Single Stage bonding)10mil8mil
  • Up to 8 Layers (Two times bonding)10mil8mil
  • Up to 8 layers (more than two times)10mil8mil
  • Above 8 layers(Single Stage bonding)12mil10mil
  • Min. Annular ring for thermal pads10mil6mil
  • Min. Thermal Air Gap8mil5mil
  • Cu area to PCB edge clearance0.25mm0.2mm
TOPInner Layers (Signal Layers)
  • Minimum Annular Ring5mil4mil
  • Finished Drill to Track clearance0.18mm (4L)
    0.20mm (6L)
    0.25mm (8L)
    0.30mm (10L)
    0.18mm (4L)
    0.20mm (6L)
    0.25mm (8L)
    0.30mm (10L)
  • Up to 8 Layers (Single Stage bonding)10mil8mil
  • Up to 8 Layers (Two times bonding)10mil8mil
  • Up to 8 layers (more than two times)10mil8mil
  • Above 8 layers(Single Stage bonding)12mil10mil
  • Cu area to PCB edge clearance12mil8mil
TOPScoring (V-cut)
  • Score line to Cu area clearance0.4mm0.4mm
TOPRouting
  • Minimum router diameter0.8mm0.8mm
  • Cu area to PCB edge clearance (Outer Layer)0.25mm0.15mm
  • Cu area to PCB edge clearance (Inner Layer)0.3mm0.2mm
TOPSlot
  • Minimum slot size0.8mm0.8mm

 

1. We prefer min. pad size >= hole size + 0.50 mm for any PTH hole.
2. NPTH holes should preferably not have any pad around them.
3. Jump scoring and depth routing possible – conditions apply

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